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Opportunity at Air Force Research Laboratory (AFRL)

Integration of Classical and Novel Dielectrics in High-Power RF Transistors

Location

Sensors Directorate, RY/Sensors Division

RO# Location
13.35.01.C0534 Wright-Patterson AFB, OH 454337542

Advisers

name email phone
Islam, Ahmad Ehteshamul ahmad.islam.2@us.af.mil 937-713-8906

Description

Successful integration of dielectrics into a transistor process flow with negligible defect density has historically been the key for wide scale application of electronic devices. Dielectrics are needed not only as gate insulators for operation of metal oxide semiconductor field-effect transistors (MOSFETs), but also needed for passivation of metal semiconductor FET (MESFET) and high-electron mobility transistor (HEMT; which is a different form of MESFET). The presence of defects either in the bulk or interface of these dielectrics critically affect the performance of transistors. Transistors for RF operation uses all the above transistor configurations. The semiconducting channel in these transistors are generally made with III-V (like GaAs, GaN, AlGaN) or III-O (like Ga2O3, AlGaO) materials. These materials do not have a native dielectric like Si does in form of SiO2, therefore, have an unoptimized dielectric/semiconductor interface even after 40 years of their introduction into RF electronics. In addition, formation of novel dielectrics on these materials poses additional challenges in terms of bulk and interface defects, carrier injection into dielectric, which lead to instability in device operation. Significant research opportunities therefore exists in integrating classical and novel dielectrics in III-V and III-O based semiconductors. These are especially important for high power RF applications that require use of ultra-wide bandgap (UWBG) materials like III-N and III-O and require high voltage application across the dielectric.

This research targets successful integration of dielectrics in high-power RF transistors. This will require optimization of wide range of process parameters during device fabrication in AFRL/RY’s class 100 (ISO-5) cleanroom. Resultant devices will go through extensive level of electrical (C-V, I-V, transient, noise), optical (different forms of spectroscopy and microscopy) and materials characterization for confirming the effect of different process parameters on device performance. AFRL have world-class characterization capability that will be useful for such characterization. The goal of this project is to general critical and novel knowledge that will enable application of UWBG materials that will satisfy unique requirements of the United States Air Force and Space Force.

2Research Classification/Restrictions:  Unclassified.

3Eligible Candidates:  Any U.S. Citizen with a PhD degree.

4References:

[1] Green et al., "β-Gallium Oxide power electronics", APL Materials, 2022, 10, 029201.

[2] Islam et al., "Hysteresis-free MOSCAP made with Al2O3/(010)β-Ga2O3 interface using a combination of surface cleaning, etching and post-deposition annealing," DRC, 2021, p. 9467169.

[3] Islam et al., "Thermal stability of ALD-grown SiO2 and Al2O3 on (010) β-Ga2O3 substrates," DRC, 2022

Keywords:
High power electronics; RF electronics; Dielectrics; Integration; III-V materials; beta-Ga2O3; interface/oxide defects

Eligibility

Citizenship:  Open to U.S. citizens
Level:  Open to Postdoctoral and Senior applicants

Stipend

Base Stipend Travel Allotment Supplementation
$76,542.00 $4,000.00

$3,000 Supplement for Doctorates in Engineering & Computer Science

Experience Supplement:
Postdoctoral and Senior Associates will receive an appropriately higher stipend based on the number of years of experience past their PhD.

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